pin assignment pin assignment 1 +5V DC 2 Button 4 (A_PB1) 3 Position 0(A_X) 4 GND 5 GND 6 Position 1 (A_Y) 7 Button 5(A_PB2) 8 +5V DC 9 +5V DC 10 Button 6 (B_PB1) 11 Position 2(B_X) 12 GND 13 Position 3(B_Y) 14 Button 7 (B_PB2) 15 +5V DC
9-pin 25-pin assignment 1 8 DCD (Data Carrier Detect) 2 3 RX (Receive Data) 3 2 TX (Transmit Data) 4 20 DTR (Data Terminal Ready) 5 7 GND (Signal Ground) 6 6 DSR (Data Set Ready) 7 4 RTS (Request To Send) 8 5 CTS (Clear To Send) 9 22 RI (Ring Indicator)
Note: DSR and DCD have been swapped
SHELL (chassis gnd) ----------- 4 (chassis gnd) 2 (TxD) ----------------------- 5 (TxD) 3 (RxD) ----------------------- 6 (RxD) 4 (RTS) ----------------------- 3 (RTS) 5 (CTS) ----------------------- 8 (CTS) 6 (DSR) ----------------------- 2 (DSR) 7 (SG) ----------------------- 7 (SG) 8 (DCD) ---------------------- 10 (DCD) 20 (DTR) ---------------------- 9 (DTR) 22 (RI) ----------------------- 1 (RI)
pin assignment pin assignment 1 -Strobe 2 Data 0 3 Data 1 4 Data 2 5 Data 3 6 Data 4 7 Data 5 8 Data 6 9 Data 7 10 -Ack 11 Busy 12 Paper Empty 13 Select 14 -Auto Feed 15 -Error 16 -Init 17 -Slct in 18 GND 19 GND 20 GND 21 GND 22 GND 23 GND 24 GND 25 GND
1 -Strobe 2 Data 0
3 Data 1 4 Data 2
5 Data 3 6 Data 4
7 Data 5 8 Data 6
9 Data 7 10 -Ack
11 Busy 12 Paper Empty
13 Select 14 -Auto Feed
15 {OSCXT} 16 Signal GND
17 Frame GND 18 +5v
19 GND 20 GND
21 GND 22 GND
23 GND 24 GND
25 GND 26 GND
27 GND 28 GND
29 GND 30 GND
31 -Prime 32 -Error
33 Signal GND 34 N/C
35 N/C 36 N/C
(From Sam Goldwasser)
pin assignment 1 CLK/CTS (open-collector) 2 RxD/TxD/RTS (open-collector) 3 Reset 4 GND 5 +5V
pin assignment 1 CLK/CTS (open-collector) 2 Keyboard Data 3 N/C 4 GND 5 +5V
pin assignment 1 KB Data 2 NC 3 Gnd 4 +5V 5 KB Clock 6 NC
pin assignment A NC B KB Data C Gnd D KB Clock E +5V F NC
ESDI Hard Disk Interface IDC-34 Male, IDC-20 Male
pin assignment pin assignment 1 GND 2 Head Sel 3 3 GND 4 Head Sel 2 5 GND 6 Write Gate 7 GND 8 Config/Stat Data 9 GND 10 Transfer Ack 11 GND 12 Attn 13 GND 14 Head Sel 0 15 GND 16 Sect/Add MK Found 17 GND 18 Head Sel 1 19 GND 20 Index 21 GND 22 Ready 23 GND 24 Trans Req 25 GND 26 Drive Sel 1 27 GND 28 Drive Sel 2 29 GND 30 Drive Sel 3 31 GND 32 Read Gate 33 GND 34 Command Data
pin assignment pin assignment 1 Drive Selected 2 Sect/Add MK Found 3 Seek Complete 4 Addr Mark Enable 5 (reserved) 6 GND 7 Write Clk+ 8 Write Clk- 9 Cartridge Chng 10 Read Ref Clk+ 11 Read Ref Clk- 12 GND 13 NRZ Write Data+ 14 NRZ Write Data- 15 GND 16 GND 17 NRZ Read Data+ 18 NRZ Read Data- 19 GND 20 GND
RLL/MFM Hard Disk Interface IDC-34 Male, IDC-20 Male
pin assignment pin assignment 1 GND 2 Head Sel 8 3 GND 4 Head Sel 4 5 GND 6 Write Gate 7 GND 8 Seek Complete 9 GND 10 Track 0 11 GND 12 Write Fault 13 GND 14 Head Sel 1 15 GND 16 (reserved) 17 GND 18 Head Sel 2 19 GND 20 Index 21 GND 22 Ready 23 GND 24 Step 25 GND 26 Drive Sel 1 27 GND 28 Drive Sel 2 29 GND 30 Drive Sel 3 31 GND 32 Drive Sel 4 33 GND 34 Direction In
pin assignment pin assignment 1 Drive Selected 2 GND 3 (reserved) 4 GND 5 (reserved) 6 GND 7 (reserved) 8 GND 9 (reserved) 10 (reserved) 11 GND 12 GND 13 Write Data+ 14 Write Data- 15 GND 16 GND 17 Read Data+ 18 NRZ Read Data- 19 GND 20 GND
[...]
The signals assigned for 44-pin applications are described in table 16. Although there
are 50 pins in the plug, the mating receptacle need contain only 44 pins (the removal
of pins E and F provides room for the wall of the receptacle).
The first four pins of the connector plug located on the device are not to be connected to the host, as they are reserved for manufacturer's use. Pins E, F and 20 are keys, and are removed.
+-------------------------------------------1-E-----+ | o o o o o o o o o o o o o o o o o o o o o o K C A | | o o o o o o o o o o o o K o o o o o o o o o K D B | +44----------------------20-----------------2-F-----+
+=================-=========-=============-=========-==================+ | Signal |Connector| |Connector| Signal | | name | contact | Conductor | contact | name | |-----------------+---------+-------------+---------+------------------| | Vendor specific| A | | B | Vendor specific | | Vendor specific| C | | D | Vendor specific | | (keypin) | E | | F | (keypin) | | RESET- | 1 | 1 | 2 | 2 | Ground | | DD7 | 3 | 3 | 4 | 4 | DD8 | | DD6 | 5 | 5 | 6 | 6 | DD9 | | DD5 | 7 | 7 | 8 | 8 | DD10 | | DD4 | 9 | 9 | 10 | 10 | DD11 | | DD3 | 11 | 11 | 12 | 12 | DD12 | | DD2 | 13 | 13 | 14 | 14 | DD13 | | DD1 | 15 | 15 | 16 | 16 | DD14 | | DD0 | 17 | 17 | 18 | 18 | DD15 | | Ground | 19 | 19 | 20 | 20 | (keypin) | | DMARQ | 21 | 21 | 22 | 22 | Ground | | DIOW- | 23 | 23 | 24 | 24 | Ground | | DIOR- | 25 | 25 | 26 | 26 | Ground | | IORDY | 27 | 27 | 28 | 28 | PSYNC:CSEL | | DMACK- | 29 | 29 | 30 | 30 | Ground | | INTRQ | 31 | 31 | 32 | 32 | IOCS16- | | DA1 | 33 | 33 | 34 | 34 | PDIAG- | | DAO | 35 | 35 | 36 | 36 | DA2 | | CS0- | 37 | 37 | 38 | 38 | CS1- | | DASP- | 39 | 39 | 40 | 40 | Ground | |* +5v (Logic) | 41 | 41 | 42 | 42 | +5V (Motor) * | |* Ground (Return)| 43 | 43 | 44 | 44 | TYPE- (0=ATA)* | |----------------------------------------------------------------------| | * Pins which are additional to those of the 40-pin cable. | +======================================================================+
Interface Signal Assignments and Descriptions
The physical interface consists of receivers and drivers communicating through a 40-conductor flat ribbon non-shielded cable using an asynchronous interface protocol. Reserved signals shall be left unconnected.
+===========================================+=============+====+=============+ | Description | Source |Pin | Acronym | +-------------------------------------------+-------------+----+-------------+ | Reset | Host | 1 | RESET- | | | n/a | 2 | Ground | | Data bus bit 7 | Host/Device | 3 | DD7 | | Data bus bit 8 | Host/Device | 4 | DD8 | | Data bus bit 6 | Host/Device | 5 | DD6 | | Data bus bit 9 | Host/Device | 6 | DD9 | | Data bus bit 5 | Host/Device | 7 | DD5 | | Data bus bit 10 | Host/Device | 8 | DD10 | | Data bus bit 4 | Host/Device | 9 | DD4 | | Data bus bit 11 | Host/Device | 10 | DD11 | | Data bus bit 3 | Host/Device | 11 | DD3 | | Data bus bit 12 | Host/Device | 12 | DD12 | | Data bus bit 2 | Host/Device | 13 | DD2 | | Data bus bit 13 | Host/Device | 14 | DD13 | | Data bus bit 1 | Host/Device | 15 | DD1 | | Data bus bit 14 | Host/Device | 16 | DD14 | | Data bus bit 0 | Host/Device | 17 | DD0 | | Data bus bit 15 | Host/Device | 18 | DD15 | | Ground | n/a | 19 | Ground | | (keypin) | n/a | 20 | Reserved | | DMA Request | Device | 21 | DMARQ | | Ground | n/a | 22 | Ground | | I/O Write | Host | 23 | DIOW- | | Ground | n/a | 24 | Ground | | I/O Read | Host | 25 | DIOR- | | Ground | n/a | 26 | Ground | | I/O Ready | Device | 27 | IORDY | | Spindle Sync or Cable Select | (note 1) | 28 | SPSYNC:CSEL | | DMA Acknowledge | Host | 29 | DMACK- | | Ground | n/a | 30 | Ground | | Interrupt Request | Device | 31 | INTRQ | | 16 Bit I/O | Device | 32 | IOCS16- | | Device Address Bit 1 | Host | 33 | DA1 | | PASSED DIAGNOSTICS | (note 1) | 34 | PDIAG- | | Device Address Bit 0 | Host | 35 | DAO | | Device Address Bit 2 | Host | 36 | DA2 | | Chip Select 0 | Host | 37 | CS0- | | Chip Select 1 | Host | 38 | CS1- | | Device Active or Slave (Device 1) Present | (note 1) | 39 | DASP- | | Ground | n/a | 40 | Ground | +-------------------------------------------+-------------+----+-------------+ | Note 1: See signal descriptions for information on source of these signals | +============================================================================+
pin assignment pin assignment 1 -Reset 2 GND 3 Data 7 4 Data 8 5 Data 6 6 Data 9 7 Data 5 8 Data 10 9 Data 4 10 Data 11 11 Data 3 12 Data 12 13 Data 2 14 Data 13 15 Data 1 16 Data 14 17 Data 0 18 Data 15 19 GND 20 Key 21 (reserved) 22 GND 23 -IOW 24 GND 25 -IOR 26 GND 27 IO Chrdy 28 Ale 29 (reserved) 30 GND 31 IRQ14 32 -IOCS16 33 Addr 1 34 (reserved) 35 Addr 0 36 Addr 2 37 -CS0 (1F0-1F7) 38 -CS1 (3f6-3f7) 39 -Active 40 GND
ISA Bus Connector EISA Bus Connector
----------------- ------------------
Back Side Component Side Back Side Component Side
pin assignment |pin assignment |pin assignment |pin assignment
B1 GND |A1 CHCHK# |F1 GND |E1 CMD#
B2 Reset DRV |A2 SD7 |F2 +5V |E2 START#
B3 +5V |A3 SD6 |F3 +5V |E3 EXRDY
B4 IRQ9 |A4 SD5 |F4 --- |E4 EX32#
B5 -5V |A5 SD4 |F5 --- |E5 GND
B6 DRQ2 |A6 SD3 |F6 ACCESS KEY |E6 ACCESS KEY
B7 -12V |A7 SD2 |F7 --- |E7 EX16#
B8 NOWS# |A8 SD1 |F8 --- |E8 SLBURST#
B9 +12V |A9 SD0 |F9 +12V |E9 MSBURST#
B10 GND |A10 CHRDY |F10 M/IO# |E10 W/R#
B11 SMWTC# |A11 AEN |F11 LOCK# |E11 GND
B12 SMRDC# |A12 SA19 |F12 (reserved) |E12 (reserved)
B13 IOWC# |A13 SA18 |F13 GND |E13 (reserved)
B14 IORC# |A14 SA17 |F14 (reserved) |E14 (reserved)
B15 DACK3# |A15 SA16 |F15 BE3# |E15 GND
B16 DRQ3 |A16 SA15 |F16 ACCESS KEY |E16 ACCESS KEY
B17 DACK1# |A17 SA14 |F17 BE2# |E17 BE1#
B18 DRQ1 |A18 SA13 |F18 BE0# |E18 LA31#
B19 REFRESH# |A19 SA12 |F19 GND |E19 GND
B20 BCLK |A20 SA11 |F20 +5V |E20 LA30#
B21 IRQ7 |A21 SA10 |F21 LA29# |E21 LA28#
B22 IRQ6 |A22 SA9 |F22 GND |E22 LA27#
B23 IRQ5 |A23 SA8 |F23 LA26# |E23 LA25#
B24 IRQ4 |A24 SA7 |F24 LA24# |E24 GND
B25 IRQ3 |A25 SA6 |F25 ACCESS KEY |E25 ACCESS KEY
B26 DACK2# |A26 SA5 |F26 LA16 |E26 LA15
B27 T/C |A27 SA4 |F27 LA14 |E27 LA13
B28 BALE |A28 SA3 |F28 +5V |E28 LA12
B29 +5V |A29 SA2 |F29 +5V |E29 LA11
B30 OSC |A30 SA1 |F30 GND |E30 GND
B31 GND |A31 SA0 |F31 LA10 |E31 LA9
|H1 LA8 |G1 LA7
D1 M16# |C1 SBHE# |H2 LA6 |G2 GND
D2 IO16# |C2 LA23 |H3 LA5 |G3 LA4
D3 IRQ10 |C3 LA22 |H4 +5V |G4 LA3
D4 IRQ11 |C4 LA21 |H5 LA2 |G5 GND
D5 IRQ12 |C5 LA20 |H6 ACCESS KEY |G6 ACCESS KEY
D6 IRQ15 |C6 LA19 |H7 D16 |G7 D17
D7 IRQ14 |C7 LA18 |H8 D18 |G8 D19
D8 DACK0# |C8 LA17 |H9 GND |G9 D20
D9 DRQ0 |C9 MRDC# |H10 D21 |G10 D22
D10 DACK5# |C10 MWTC# |H11 D23 |G11 GND
D11 DRQ5 |C11 SD8 |H12 D24 |G12 D25
D12 DACK6# |C12 SD9 |H13 GND |G13 D26
D13 DRQ6 |C13 SD10 |H14 D27 |G14 D28
D14 DACK7# |C14 SD11 |H15 ACCESS KEY |G15 ACCESS KEY
D15 DRQ7 |C15 SD12 |H16 D29 |G16 GND
D16 +5V |C16 SD13 |H17 +5V |G17 D30
D17 MASTER16# |C17 SD14 |H18 +5V |G18 D31
D18 GND |C18 SD15 |H19 MAKx |G19 MREQx
Back Side Component Side Back Side Component Side pin assignment |pin assignment |pin assignment |pin assignment B1 Dat00 |A1 Dat01 |B30 Adr17 |A30 Adr16 B2 Dat02 |A2 Dat03 |B31 Adr15 |A31 Adr14 B3 Dat04 |A3 GND |B32 Vcc |A32 Adr12 B4 Dat06 |A4 Dat05 |B33 Adr13 |A33 Adr10 B5 Dat08 |A5 Dat07 |B34 Adr11 |A34 Adr08 B6 GND |A6 Dat09 |B35 Adr09 |A35 GND B7 Dat10 |A7 Dat11 |B36 Adr07 |A36 Adr06 B8 Dat12 |A8 Dat13 |B37 Adr05 |A37 Adr04 B9 Vcc |A9 Dat15 |B38 GND |A38 WBACK# B10 Dat14 |A10 GND |B39 Adr03 |A39 BEO# B11 Dat16 |A11 Dat17 |B40 Adr02 |A40 Vcc B12 Dat18 |A12 Vcc |B41 n/c |A41 BE1# B13 Dat20 |A13 Dat19 |B42 RESET# |A42 BE2# B14 GND |A14 Dat21 |B43 DC# |A43 GND B15 Dat22 |A15 Dat23 |B44 M/ID# |A44 BE3# B16 Dat24 |A16 Dat25 |B45 W/R# |A45 ADS# B17 Dat26 |A17 GND | | B18 Dat28 |A18 Dat27 | | B19 Dat30 |A19 Dat29 |B48 RDYRTN# |A48 LRDY# B20 Vcc |A20 Dat31 |B49 GND |A49 LDEV(x)# B21 Adr31 |A21 Adr30 |B50 IRQ9 |A50 LREQ(x)# B22 GND |A22 Adr28 |B51 BRDY# |A51 GND B23 Adr29 |A23 Adr26 |B52 BLAST# |A52 LGNT(x)# B24 Adr27 |A24 GND |B53 ID0 |A53 Vcc B25 Adr25 |A25 Adr24 |B54 ID1 |A54 ID2 B26 Adr23 |A26 Adr22 |B55 GND |A55 ID3 B27 Adr21 |A27 Vcc |B56 LCLK |A56 ID4 B28 Adr19 |A28 Adr20 |B57 Vcc |A57 LKEN# B29 GND |A29 Adr18 |B58 LBS16# |A58 LEAD5#
Connector 1 to Connector 2 DTR DSR/DCD DSR/DCD DTR RTS CTS CTS RTS TXD RXD RXD TXD GND GND
pin assignment|pin assignment|pin assignment|pin assignment 1 Vcc |9 Gnd |17 A8 |25 DQ7 2 -CAS |10 DQ2 |18 A9 |26 QP 3 DQ0 |11 A4 |19 A10 |27 -RAS 4 A0 |12 A5 |20 DQ5 |28 -CASP 5 A1 |13 DQ3 |21 -WE |29 DP 6 DQ1 |14 A6 |22 Gnd |30 Vcc 7 A2 |15 A7 |23 DQ6 8 A3 |16 DQ4 |24 N/C
Notes:
pin assignment|pin assignment|pin assignment|pin assignment 1 Gnd |19 A10 |37 MP1 |55 DQ11 2 DQ0 |20 DQ4 |38 MP3 |56 DQ27 3 DQ16 |21 DQ20 |39 Gnd |57 DQ12 4 DQ1 |22 DQ5 |40 -CAS0 |58 DQ28 5 DQ17 |23 DQ21 |41 -CAS2 |59 Vcc 6 DQ2 |24 DQ6 |42 -CAS3 |60 DQ29 7 DQ18 |25 DQ22 |43 -CAS1 |61 DQ13 8 DQ3 |26 DQ7 |44 -RAS0 |62 DQ30 9 DQ19 |27 DQ23 |45 -RAS1 |63 DQ14 10 Vcc |28 A7 |46 N/C |64 DQ31 11 N/C |29 N/C |47 -WE |65 DQ15 12 A0 |30 Vcc |48 N/C |66 N/C 13 A1 |31 A8 |49 DQ8 |67 PD1 14 A2 |32 A9 |50 DQ24 |68 PD2 15 A3 |33 -RAS3 |51 DQ9 |69 PD3 16 A4 |34 -RAS2 |52 DQ25 |70 PD4 17 A5 |35 MP2 |53 DQ10 |71 N/C 18 A6 |36 MP0 |54 DQ26 |72 Gnd
Notes:
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